Semiconductor Device and Method for Manufacturing the same

ABSTRACT

A semiconductor device consistent with the present invention includes a semiconductor substrate having a semiconductor chip region and a scribe region; a first insulating layer formed in the semiconductor chip region of the semiconductor substrate; a metal contact plug formed in the first insulating layer; a metal sidewall formed on a side of the first insulating layer in the scribe region; a metallization wiring electrically connected with the substrate via the metal contact plug; and a second insulating layer and a protective layer formed over the metal contact plug and the metal sidewall so as to cover the semiconductor chip region and the scribe region.

RELATED APPLICATION

This is a divisional of application Ser. No. 11/484,770, filed on Jul.12, 2006, which is based upon and claims the benefit of priority toprior Korean Application No. 10-2005-0062663, filed on Jul. 12, 2005.The entire contents of both applications are herein incorporated byreference in their entirety.

BACKGROUND

1. Technical Field

The present invention relates to a semiconductor device and a method formanufacturing the same.

2. Description of the Related Art

A semiconductor wafer having a plurality of integrated circuits formedby a series of manufacturing processes is cut into individualsemiconductor chips. In general, a wafer sawing equipment is used incutting a semiconductor wafer.

A sawing blade is generally used as a wafer sawing equipment. A laserbeam can be also used. A semiconductor wafer is divided into unit chipsusing the sawing blade.

Sawing process using a blade can be also applied in division of asubstrate strip, on which a semiconductor chip is mounted, into unitsemiconductor chip packages. Hereinafter, a conventional method formanufacturing a semiconductor device will be described referring to thefollowing drawings.

FIGS. 1A to 1E are cross-sectional views illustrating a conventionalmethod for manufacturing a semiconductor device.

As shown in FIG. 1A, a first insulating layer 11 is formed on asemiconductor substrate (not shown) having a semiconductor chip regionand a scribe region.

Then, portions of the first insulating layer 11 is selectively removedto expose a surface of the semiconductor substrate, usingphotolithography and etching processes, thus forming a contact hole 12.

Referring to FIG. 1B, a metal layer for a contact plug is deposited overan entire surface of the semiconductor substrate, filling the contacthole 12. The substrate then undergoes a chemical mechanical polishing(CMP) process, thus forming a metal contact plug 13 within the contacthole 12.

Next, as shown in FIG. 1C, another metal layer for a metallizationwiring is deposited over the entire surface of the substrate, and isselectively removed by photolithography and etching processes, thusforming the metallization wiring 14 electrically connected with apredetermined circuit element on the substrate via the metal contactplug 13.

As shown in FIG. 1D, a second insulating layer 15 is formed over theentire surface of the substrate including the metallization wiring 14,and then a protective layer 16 is formed on the second insulating layer15.

After forming the protective layer 16, the substrate is divided intounit chips by a sawing process at the scribe region. FIG. 1E shows theside surface “A,” which is exposed to the atmosphere by the sawingprocess.

The above-described conventional method for manufacturing asemiconductor device has a number of problems. Particularly, even thoughthe top surface of the divided unit chip is protected by the protectivelayer 16, the side surfaces of the second insulating layer 15 and thefirst insulating layer 11 are exposed to the atmosphere by the sawingprocess. Accordingly, oxygen or nitrogen in the atmosphere may penetrateinto the semiconductor chip through the exposed surfaces of the secondinsulating layer 15 and the first insulating layer 11, thus resulting indeterioration of the semiconductor chip.

SUMMARY

Embodiments consistent with the present invention provide asemiconductor device, wherein penetration of impurities such as oxygenor nitrogen in the atmosphere into the semiconductor chip can beprevented, and a method for manufacturing the same. The presentinvention improves the characteristics and reliability of thesemiconductor chip.

A semiconductor device consistent with the present invention includes asemiconductor substrate having a semiconductor chip region and a scriberegion; a first insulating layer formed in the semiconductor chip regionof the semiconductor substrate; a metal contact plug formed in the firstinsulating layer; a metal sidewall formed on a side of the firstinsulating layer in the scribe region; a metallization wiringelectrically connected with the substrate via the metal contact plug;and a second insulating layer and a protective layer formed over themetal contact plug and the metal sidewall so as to cover thesemiconductor chip region and the scribe region.

A method for manufacturing a semiconductor device consistent with thepresent invention includes forming a first insulating layer on asemiconductor substrate having a semiconductor chip region and a scriberegion; forming a mask pattern on the first insulating layer, the maskpattern including a first opening exposing a contact area in thesemiconductor chip region and a second opening exposing the scriberegion; removing portions of the first insulating layer using the maskpattern so as to form a contact hole in the semiconductor chip regionand a scribe region opening exposing the scribe region; forming a metalcontact plug in the contact hole and a metal sidewall on a side of thefirst insulating layer in the scribe region opening; forming ametallization wiring on the first insulating layer, the metallizationlayer electrically connected with the metal contact plug; and forming asecond insulating layer and a protective layer over the metal contactplug and the metal side wall so as to cover the semiconductor chipregion and the scribe region.

These and other aspects of the invention will become evident byreference to the following description of the invention, often referringto the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A to 1E are cross-sectional views illustrating a conventionalmethod for manufacturing a semiconductor device; and

FIGS. 2A to 2F are cross-sectional views illustrating a method formanufacturing a semiconductor device consistent with the presentinvention.

DETAILED DESCRIPTION

FIGS. 2A to 2F are cross-sectional views illustrating a method formanufacturing a semiconductor device consistent with the presentinvention.

As shown in FIG. 2A, a first insulating layer 110 is formed on asemiconductor substrate (not shown) having a semiconductor chip regionand a scribe region.

Next, a mask pattern 120 is formed on the first insulating layer 110,exposing portions of the first insulating layer 110 in the semiconductorchip region and the scribe region. The mask pattern 120 may be formedusing a metal contact mask or a photoresist material.

FIG. 2B shows that the first insulating layer 110 in semiconductor chipregion is exposed through an opening 120 a in the mask pattern 120, andthat the first insulating layer 110 in the scribe region is exposedthrough an opening 120 b in the mask pattern 120. Then, the exposedportions of the first insulating layer 110 are removed by an etchingprocess using the mask pattern 120. As a result, a contact hole 130 a isformed underneath the opening 120 a in the first insulating layer 110,and a scribe region opening 130 b exposing the scribe region is formedunderneath the opening 120 b.

Subsequently, as shown in FIG. 2C, the mask pattern 120 is removed, anda metal layer for a contact plug is deposited over the entire surface ofthe substrate, filling in the contact hole 130 a and the scribe regionopening 130 b. Here, the metal layer may comprise tungsten, copper, andother suitable metal material may have a thickness such that the metallayer completely fills the contact hole 130 a.

Afterward, the substrate including the metal layer undergoes a CMPprocess or an etch back process, thus forming the metal contact plug 140in the contact hole 130 a and the metal sidewall 150 on one side of thefirst insulating layer 110 in the scribe region opening 130 b.

The CMP process may be performed until the contact plug 140 iscompletely formed in the contact hole 130 a. During such process, themetal material filled in the opening 130 b may be significantly removeddue to a dishing phenomenon, thus forming the metal sidewall 150 in thevicinity of the boundary of the first insulating layer 110. In addition,when the etch back process for the metal layer is performed to exposethe first insulating layer 110, the metal layer filled in the opening130 b can be removed significantly, thus resulting in the metal sidewall150 in the form of a spacer at the side of the first insulating layer110. When the metal material considerably remains in the opening 130 bafter the CMP or etch back process, the semiconductor chip region wherethe contact plug 140 is formed is blocked using an additional mask, andthen an additional etch back process can be performed to form the metalsidewall 150 in the scribe region where the opening 130 b exists.

Subsequently, as shown in FIG. 2D, another metal layer is deposited overthe entire surface of the semiconductor substrate including the metalcontact plug 140, and is selectively removed by photolithography andetching processes, thus forming the metallization wiring 160electrically connected with the substrate via the metal contact plug140. Here, the metallization wiring 160 may comprise copper or tungsten.

Alternatively, the contact plug 140 and the metallization wiring 160 maybe simultaneously formed using a copper damascene process. The damasceneprocess generally involves forming a damascene structure including avia-hole and a trench in an insulating layer, and then filling thedamascene structure with a copper material to simultaneously form acontact plug and a metallization wiring. When the damascene technique isused, the opening 130 b exposing the scribe region can be formed alongwith the damascene structure. In addition, the damascene processincludes a planarization step using a CMP technique after filling thedamascene structure with copper. Accordingly, a dishing phenomenon canalso occur so that the copper material filled in the opening 130 b isconsiderably removed. Thus, the metal sidewall 150 can be formed duringthe CMP process. Moreover, in case of the damascene process, a barriermetal layer is preferably deposited on the damascene structure beforefilling the trench and via with copper.

Next, as shown in FIG. 2E, a second insulating layer 170 is formed overthe entire surface of the semiconductor device including themetallization wiring 160, and a protective layer 180 is formed on thesecond insulating layer 170. After forming the protective layer 180, thesubstrate is sawed in the scribe region, thus forming the semiconductorchip having the structure as shown in FIG. 2F. Referring to FIG. 2F, thenumber of interfaces exposed in the atmosphere due to the sawing processis considerably reduced. Namely, the exposed surface (referred to as“B”) includes fewer interfaces between the layers of material in thesemiconductor device and the atmosphere. Accordingly, penetration ofimpurities such as oxygen or nitrogen in the atmosphere into the layersof material in the semiconductor device is prevented, andcharacteristics and reliability of the semiconductor chip are improved.

While the invention has been shown and described with reference tocertain preferred embodiments thereof, it will be understood by thoseskilled in the art that various changes in form and details may be madetherein without departing from the spirit and scope of the invention asdefined by the appended claims.

1. A semiconductor device, comprising: a semiconductor substrate havinga semiconductor chip region and a scribe region; a first insulatinglayer formed in the semiconductor chip region of the semiconductorsubstrate; a metal contact plug formed in the first insulating layer; ametal sidewall formed on a side of the first insulating layer in thescribe region; a metallization wiring electrically connected with thesubstrate via the metal contact plug; and a second insulating layer anda protective layer formed over the metal contact plug and the metalsidewall so as to cover the semiconductor chip region and the scriberegion.
 2. The semiconductor device of claim 1, wherein the metalsidewall forms a spacer. 3-11. (canceled)
 12. The semiconductor deviceof claim 1, wherein the metal contact plug is formed after depositing ametal layer.
 13. The semiconductor device of claim 12, wherein the metallayer comprises tungsten.
 14. The semiconductor device of claim 1,wherein the metallization wiring comprises copper.
 15. The semiconductordevice of claim 12, wherein the metal sidewall has a spacer form.